Samsung Electronics on Monday marked the first shipment of 3-nanometer semiconductors at a ceremony, a key milestone in the race to build the most advanced and efficient chips to date.
The next-generation 3nm chips are built on Gate-All-Around (GAA) technology, which Samsung said will eventually allow an area reduction of up to 35 percent, while providing 30 percent higher performance and 50 percent lower power consumption, compared with the existing FinFET process.
Samsung said its first generation of the 3nm process node achieves a 16 percent area reduction, 23 percent higher performance, and 45 percent lower power consumption, reports Yonhap news agency.
The advancement in the sophisticated chipmaking technology, which happened faster than its foundry rival TSMC of Taiwan, is expected to bring Samsung more customers looking for powerful chips that enable smaller, faster, and more efficient technology products.
“Samsung opened a new chapter in the foundry business today, with the start of mass production of 3nm chips,” Kyung Kye-hyun, CEO of Samsung’s device solutions division.
“The development of the GAA technology earlier than expected as an alternative to the FinFET process was an innovative breakthrough,” Kyung said.
Samsung said it started developing the GAA technology in the early 2000s and succeeded in 2017 in applying it to the 3nm node.
The tech giant said high-performance computing is the first product developed based on the 3nm GAA technology and it plans to expand the application into other product categories.
The world’s largest memory chip maker has collaborated with its partners, including German tech firm Siemens and American silicon design company Synopsys, which are members of the Samsung Advanced Foundry Ecosystem (SAFETM), since the third quarter of last year to provide its foundry customers with chip design infrastructure and other services.
TSMC, the world’s largest contract chip manufacturer, said it will begin mass production of 3nm chips in the second half of the year.
Samsung, the world’s largest memory chip maker, and second-largest foundry player, has said its 2nm process node was in the early stages of development, with mass production planned for 2025.
